XC3090-70PC84C ApplicationField
-Internet of Things
-Industrial Control
-Artificial Intelligence
-5G Technology
-Medical Equipment
-Consumer Electronics
-Cloud Computing
-Wireless Technology
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XC3090-70PC84C FAQ
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XC3090-70PC84C Features
– Over 20 different packages
• Extensive Packaging Options
– TTL or CMOS input thresholds
– Avoids the NRE, time delay, and risk of conventional masked gate arrays
– On-chip crystal oscillator amplifier
– 100% factory pre-tested devices
• High-performance CMOS static memory technology
– High fan-out signal distribution, low-skew clock nets
– Extensive register, combinatorial, and 1/0 capabilities
– Replaces TTL, MSI, and other PLD logic
• Ideal for a wide range of custom VLSI design tasks
– Plastic and ceramic surface-mount and pin-grid· array packages
– Internal 3-state bus capabilities
– Low quiescent and active power consumption
– System clock speeds over 80 MHz
– Easy design iteration
• Unlimited reprogrammability
– In-system logic changes
– Guaranteed toggle rates of 70 to 325 MHz, logic delays from 9 to 2.2 ns
– Integrates complete sub-systems into a single package
– Compatible arrays ranging from 1,000 to 7,500 gate complexity
– Standard, off-the-shelf product availability
– Thin and Very Thin Quad Flat Pack (TQFP and VQFP) options
• Flexible FPGA architecture
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XC3090-70PC84C Overview
The CMOS XC3090-70PC84C of Logic Cell Array (LCA)
families provide a group of high-performance, high-density, digital integrated circuits. Their regular, extendable,
flexible, user-programmable array architecture is com·
posed of a configuration program store plus three types of
configurable elements: a perimeter of 1/0 Blocks (lOBs), a
core array of Configurable Logic Bocks (CLBs) and re·
sources for interconnection. The general structure of an
LCA XC3090-70PC84C device is shown in XC3090-70PC84C Diagram on the next page. The
XACT development system provides schematic capture
and auto place-and-route for design entry. Logic and
timing simulation, and in-circuit emulation are available as
design verification alternatives. The design editor is used
for interactive design optimization, and to compile the data
pattern that represents the configuration program.
The LCA user logic functions and interconnections are
determined by the configuration program data stored in
internal static memory cells. The program can be loaded in
any of several modes to accommodate various system
requirements. The program data resides externally in an
EEPROM, EPROM or ROM on the application circuit
board, or on a floppy disk or hard disk. On-chip initialization
logic provides for optional automatic loading of program
data at power-up. The companion XC17XX Serial
Configuration PROMs provide a very simple serial config·
uration program storage in a one-lime programmable
package.
XC3090-70PC84C Tags
XC3000 Series FPGAs starter kit
Xilinx XC3090
XC3000 Series FPGAs evaluation kit
XC3090 evaluation board
XC3000 Series FPGAs XC3090
Xilinx XC3000 Series FPGAs development board
XC3090 development board
XC3090 reference design
XC3090-70PC84C TechnicalAttributes
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