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Why does the STM32 need to turn on the peripheral clock first?

First, why we should turn on the STM32 peripheral clock first; second, about the I/O multiplexing function of STM32 and when to turn on the AFIO clock.

Why does STM32 need to turn on the peripheral clock first?

I believe that many of you have encountered this pitfall, and I also encountered it when I was first learning STM32. Here, I will talk about why we should first turn on the STM32 peripheral module clock, and then its peripheral module initialization configuration?

1, system architecture

Different types of STM32, its system architecture varies, but the principle is similar, consisting of multiple master buses and multiple controlled buses (please refer to the [Reference Manual] memory and bus architecture chapter).

Take STM32F4 as an example.

● Eight master buses.

  • Cortex-M4F core I-bus, D-bus and S-bus
  • DMA1 memory bus
  • DMA2 memory bus
  • DMA2 Peripheral bus
  • Ethernet DMA bus
  • USB OTG HS DMA bus

Seven Controlled Buses.

  • Internal Flash ICode bus
  • Internal Flash DCode bus
  • Primary internal SRAM1 (112 KB)
  • Auxiliary internal SRAM2 (16 KB)
  • Auxiliary internal SRAM3 (64 KB) (STM32F42xxx and STM32F43xxx devices only)
  • AHB1 peripherals (includes AHB-APB bus bridge and APB peripherals)
  • AHB2 peripheral
  • FSMC

With the help of the bus matrix, access from the master bus to the controlled bus is possible, so that the system can achieve concurrent access and efficient operation even during the simultaneous operation of multiple high-speed peripherals.

2、About AHB and APB bus

AHB: Advanced High-performance Bus, that is, the advanced high-performance bus.

APB: Advanced Peripheral Bus, that is, the advanced peripheral (peripheral) bus.

The above mentioned system bus architecture leads to the AHB and APB bus, so why should we talk about the AHB and APB bus?

The peripheral devices we operate are generally located on the AHB and APB buses, and the AHB can lead to AHB1, AHB2, and even AHB3. Similarly APB also exists APB1, APB2, etc. For example, the USART1 peripheral device is located on the AHB bus.

For example, USART1 peripheral is located on APB1 bus, and GPIOA is located on AHB1 high-speed bus.

Please note that in the section “AHB/APB Bus Bridge” in the reference manual, there is an important point: after each chip reset, all peripheral clocks are turned off (except for SRAM and Flash interfaces). Before using peripherals, you must enable their clocks in the RCC_AHBxENR or RCC_APBxENR registers.

3、STM32 clock control

Please refer to STM32 reference manual chapter on [Reset and Clock Control RCC].

The STM32 clock control module varies depending on the MCU chip, but the principles are similar and the functionality is quite rich. The main purpose is to provide clocks to relatively independent peripheral modules, but also to reduce the functionality of the entire chip.

Reduce power consumption is the main reason, there is another reason, is to be compatible with different speeds of the device, some high-speed, some low-speed, if all use high-speed clock, is bound to cause waste.

RCC to peripherals to provide a clock is a major purpose, so why provide a clock? The reason is that the registers of peripheral devices need clocks to work. You can think of a peripheral as a device, and that device needs to be given power (a clock) to work.

You may see this sentence in the “RCC” chapter of the STM32 reference manual: When the peripheral clock is not enabled, the software can not read out the value of the peripheral registers, the value returned is always 0x0.

4、Summary

See here, I believe the smart you have understood why we have to first turn on the STM32 peripheral module clock, and then configure its peripheral module.

Simply put, the operation of peripherals is achieved through the peripheral bus, only the peripheral bus has a clock to operate the peripherals.

Pit.

A. first enable the peripheral clock, and then configure it

This low-level error based on the standard peripheral library, I believe there must be many people have encountered, I hope to raise awareness.

AFIO multiplexed clock

A friend asked: “When to turn on the AFIO clock”. Written the above section, by the way, tell about the STM32 I/O multiplexing function and when to turn on the AFIO clock.

1, what is the I/O multiplexing function?

Simply put, it is the use of ordinary I/O for other functions. For example, if the PA9 pin is used as the Tx pin of USART1, then we will call this Tx pin the PA9 multiplexing function.

When you open the datasheet, you will find a list similar to the following.

2、When to turn on AFIO clock?

In order to optimize the number of peripherals in the chip pin package, you can remap some multiplexing functions to other pins. Set the multiplexing remapping and debug I/O configuration registers to implement the pin remapping. In this case, the multiplexed functions are no longer mapped to their original assignments, but to the “redefined functions” (see above).

This redefinition of pins to other pins is available on almost all STM32 chips, but the method of implementation may vary, with the STM32F1 connecting specific function pins to the corresponding PORT and PIN by means of event control.

Simply put, if you need to use the redefine function, then you need to turn on the AFIO clock.

Finally, if you think your program may be due to a clock configuration problem, try enabling all clocks in the first step of power up.

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