Storage and computation integration refers to the transformation of the traditional computation-centric architecture into a data-centric architecture, which can break through the bottleneck of storage and computation separation under the von Neumann architecture and directly use memory for data processing, thus integrating data storage and computation in the same chip and greatly improving computational parallelism and energy efficiency ratio, which is especially suitable for deep learning neural network fields, such as wearable devices, mobile devices, smart home and other scenarios.

In the last article, we introduced the advantages of the new non-volatile storage medium ReRAM for storing and computing in one big AI chip, and today we will introduce another common storage medium – SRAM.

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Application of SRAM in storage and computing integration

In the academic field, SRAM has become a popular research object in the field of storage and computing integration by virtue of its high maturity and high access speed. In terms of market applications, SRAM is suitable for IP as a traditional storage medium, and SRAM storage and computing integration has certain application value in small and medium computing power, end-side, and scenarios that do not require standby power consumption, such as wearable devices, edge computing, and unmanned vehicles. However, due to its large cell area, high static power consumption, volatility, sensitivity to PVT changes, low storage density, low density enhancement potential, and high cost, it is limited in some large computing power, large capacity, and high density integration of large neural network computing scenarios.

Two major challenges of SRAM for large neural network computing

1 Leakage current

When SRAM is used in storage and computation integrated architecture, since SRAM generates static leakage power even in standby, a large number of SRAMs are packaged together to achieve huge amount of parallel computation (read operation) to solve the huge current-voltage fluctuation problem and power consumption problem. Therefore, for enterprises, the design and engineering of SRAM with large capacity and high parallelism (high computing power) has a high process and design threshold, which leads to extremely high design and engineering costs and becomes a difficult obstacle to cross on the way to commercialization of SRAM-based storage and computing technology.

In future vehicle and data center applications, the high power consumption of SRAM and the temperature sensitivity of the device characteristics may also lead to high power consumption and unstable operation.

2 Density

The SRAM basic cell is a latch structure consisting of 6 Transistors, which is relatively low density. The memory cell requires more Transistors for control when doing memory arithmetic, such as the architecture using 8T, 10T or more Transistors, which leads to a large area and limited unit density.

At the same time, the SRAM arithmetic power improvement mainly relies on the process process upgrade, the device itself is difficult to achieve a large-scale breakthrough in density.

As mentioned in the previous issue, ReRAM has a natural advantage of miniaturization, and it is possible to double the density per generation without relying mainly on CMOS manufacturing process upgrade.

In the future, large neural network parameters are often several GB, SRAM is difficult to accommodate such large parameters, it is difficult to keep pace with the development of AI model scale. In contrast, the ReRAM-based storage and computing chip can easily achieve high density, and the solution of YC Technology can also realize multi-chip interconnection, further enhancing the density and arithmetic power from the system-on-a-chip perspective.

The ReRAM-based all-digital storage and computation technology does not require ADC/DAC analog-to-digital and digital-to-analog signal converters, and is not affected by signal-to-noise ratio, and the accuracy can reach 32 bits or even higher. The AI chip is ideal for achieving large computing power, high accuracy and energy efficiency.

Reviewed and edited by Zixiong Tang

Translated with www.DeepL.com/Translator (free version)