The development of integrated circuits and computer systems requires increasingly low power consumption. This paper discusses the development trend of low-power circuits and systems, analyzes the main causes of power consumption and the relationship with cost, and proposes several solutions to achieve low power.
Integrated System Design
Today, integrated circuits and computer systems are becoming more and more complex. In order to accommodate this change, designers need to consider the power consumption requirements in the main design parameter table. The standard for low-power logic circuits is defined as less than 1.3uW/MHz per gate level, while in analog circuits it is defined as less than 5mW. end-users believe that low-power systems should meet the requirements of low power consumption.
For the overall system design, power consumption has become more and more important in the design, which is the inevitable trend of the development of the electronics industry. The general trend of the development of the electronics industry is to provide smaller, lighter and more powerful end products. There are also wireless and portable requirements in many product areas, and the design task will become more difficult from a power point of view. The goal of battery-powered product performance is that a single or a group of rechargeable batteries can maintain the device for several days of continuous operation, such as the now widely used Walkman single-players or cellular phones.
In addition, new requirements for low power consumption are being explicitly written into the “green” computer specifications by environmental organizations. Barta, sales manager of VLSI Technology’s Mobile Products Division, noted that desktop computers have a tendency to develop into “deep green” computers. These machines will hang up all operations until woken up by the relevant stimulus signal before entering normal operation mode, which is similar to the laptops power-saving mode.
ARPA (U.S. Department of Defense Advanced Research Projects Agency) is the field of low-power electronics for in-depth research, with a view to developing a mainstream technology, so that the power consumption of the new generation of electronic systems is much lower than the power consumption of existing systems. They feel the need to integrate the use of advanced materials, devices, circuit structures, power management and other areas of advanced technology, which is particularly important for mobile computing and communications systems, because these two areas involve a large number of mixed signal processing, radio frequency subsystems and DC source circuits for efficient power conversion and distribution systems.
With the exponential increase in circuit density every few years, to achieve higher power density in a smaller package size, increasingly difficult, many designers also understand that increasingly high interconnect density and increasingly fine PCB routing will bring a series of problems. The power consumption may reach 30 to 40W, so much power has far exceeded the thermal capacity of the package. The heat density and package limitations caused by power consumption in the system presents a greater challenge to designers, because high temperature operation can bring reliability and functionality problems to the integrated circuit. Many reliability calculation failure models are exponential functions of the thermal coefficient, and these failure models related to temperature include operating device failures as well as current density, and metal interconnect failures.
Low Power Applications
In battery-powered mode, some portable computers can operate for more than six hours. Increasing the battery size to extend battery operating time is not feasible due to the physical size and weight limitations of portable computers, which do not allow the addition of fans or other coolers, and also limit the size and weight of the battery.
Another example of a low-power system is the cellular phone, which can be used for system control microprocessor, analog circuitry, digital circuitry and RF circuitry together into a very small package, the battery in a single charge, can work in “receive, standby” mode for a full day, and can have an hour of talk time.
Generally speaking, low-power systems must face additional performance limitations associated with low power consumption, and system designs now include power consumption as one of the key performance indicators. The development of semiconductor processes and circuit structures has brought tremendous advances in component performance, but also in power consumption. In many cases it is very difficult to balance performance and power consumption, but a variety of solutions are available using appropriate power control methods or innovative designs.
Lowering the supply voltage can have two side effects. First, the lower the circuit operating voltage, the slower the speed. If all other factors remain the same, it will reduce the current of capacitor charging and discharging or load driving current. Second, a lower voltage will result in lower output power or lower signal amplitude, which can create noise and signal attenuation problems.
Causes of power consumption
The overall power consumption depends on many factors, such as substrate technology, package density, external environment, product performance and supply voltage. In practical applications, the higher the speed, the higher the power consumption.
The power consumed on the resistor is denoted as I2R, which is usually generated by the load device and parasitic components. This aspect of power consumption is present to a greater or lesser extent regardless of the technology used, especially in resistive load circuits such as analog circuits. When deep submicron technology is used, the wires (metal conductors) and interlayer parasitic resistances in the circuit generate static impedance power consumption, and a certain amount of current is consumed in dynamic power consumption.
The normal operating mode of an active device can be described by a transfer curve and certain I-V characteristics, as shown in Figure 1. The product of voltage and current at the operating point is a function of power and applies to all active devices. This product is a static value that incorporates both drain and bias currents for both passive and active devices.
In CMOS circuits, ideally, the I-V transfer curve is a transient function, and no power is consumed to transfer from one state to another when the I-V transfer curve crosses the threshold. In practice, however, the transfer curve is not ideally square, so there is a large (potentially) switching current at each state transfer. Theoretically, in the worst case of the state transfer process, a switching device with zero internal resistance will create a direct short circuit between power and ground.
In CMOS circuits, the maximum power consumption comes from the charging and discharging of internal and external capacitors, and is usually expressed in W/Hz for each gate circuit. Accordingly, it is possible to calculate the power required to charge and discharge the capacitors of the gate or output load (including the circuit package and PCB traces) of the back stage. The peak current I = C(V/T), V is approximately equal to the supply voltage of the CMOS circuit, T is the rising or falling edge time, and C is the post-stage load capacitance, so the peak current is usually relatively large. The average switching power P=C(V)2F, where C is the load capacitance at the output, V is the supply voltage, and F is the switching frequency.
System cost of power consumption
The higher the system power, the higher the supply voltage required and the more expensive the cost. The resulting impact involves the power bus, on-board bypass capacitors, motherboard cabling, power line filters and even power cables and fuses. In addition, larger power supplies require more space and therefore may affect the overall system package.
Battery size, weight and cost depend on the overall power requirements of the system and the required operating time per charge. In general, the larger the battery the higher the cost. Backup batteries and chargers may be comparable in size and weight to the original device, and therefore can severely impact the portability of the device.
Power supply can be expressed in “dollars / W” to the cost. The lower the overall power requirements of the system, the lower the overhead in terms of power supply. At the same time, small power products occupy less space, their own power consumption is also less, and therefore will be beneficial to the overall power consumption of the system.
Heat management of small electronic systems requires many different features, but may not be easy to do. Because, the system may not have enough space or power to place cooling components, and some systems may not tolerate the noise caused by cooling components as well as electronic noise. The limitations of the package form factor may also force all heat-producing components to be concentrated in a small area, which can exacerbate heat dissipation problems, and users may feel uncomfortable when a hot plastic-cased electronic device is placed on their laps. Open operation of equipment for heat dissipation is also not allowed for inline-operated systems, especially for systems sold to Europe.
Other issues include the cost of fans and other cooling components, which increases when accelerated air flow is required; heat sinks and heat pipes help to dissipate heat from the heat source, but heat still needs to be removed from the system.
Low-cost plastic packages cannot accommodate the high power characteristics required for highly integrated ICs, which forces the use of expensive packages with heat management features or other more sophisticated cooling systems.
Implementation options for low-power circuits
The IC industry is seeking multiple ways to meet low-power system requirements, one of which is to change the operating voltage of digital devices from 5V to 3.3V and the supply voltage of analog devices from ±15V to a single 5V supply. These changes are attributed to advanced silicon technology and circuit architecture. katz, vice president of marketing at Atmel, said the future trend of digital chip operating voltage will be 2.5V, 1.8V or even lower voltage, they are 0.9V (the minimum limit of the battery voltage) multiples. Device complexity, higher operating frequency and device physical properties will jointly promote this trend, when the sub-micron geometry of smaller devices with a thinner oxide layer will be difficult to withstand higher supply voltages.
ASIC manufacturers will also take the approach of adding 3V core cells and macros to their products to meet low power system requirements. These products are optimized to work with either a 3V or 5V power supply and have the same performance metrics, using special interface units that still retain a 5V power interface. According to Harrington of AT&T Bell Labs, the biggest obstacle affecting the rapid replacement of supply voltage is that a large number of existing systems use 5V power supplies, and these systems require products to retain backward compatibility with other 5V (TTL) interfaces.
In addition, in the system design, a rough evaluation of speed and, where possible, appropriate changes in component selection can also reduce power.
The following options are available.
- Reduce the operating voltage. Power consumption will be reduced by 60% when the voltage is reduced from 5V to 3V.
- Use intelligent power supply. Add appropriate intelligence to the system to predict, detect, and power the system only when needed. Many laptops and their power management have this special mechanism to power only the circuits that need to work, and reduce the clock rate when not necessary.
- Use a lower clock rate. As the power in CMOS circuits is a function of the switching frequency, so the lower clock rate of the device power consumption is also smaller.
- Limit the input signal. In analog circuits (including A/D converters), limiting the bandwidth of the input signal helps reduce the requirement for high-speed circuitry, and if it is possible to reduce the rate of the A/D converter, it can also reduce power consumption.
- expand the output range. For many ASICs, the output circuit is designed to drive only a standard IC. by realigning the circuitry so that it is sufficient to drive the package and parasitic components on the board, and leave a safe margin for fan load, which can reduce the output circuit size and power.
BiCMOS circuits combine the advantages of CMOS devices and bipolar devices, and are the best compromise between higher process complexity and higher cost. GaAs devices can also meet lower power and higher speed requirements for high-priced systems where speed is the primary design goal.
Semiconductor manufacturers are developing new design techniques to meet specific power requirements while still guaranteeing the circuit’s performance metrics requirements. Pivot, an application engineer at Motorola Semiconductor, said the ultimate goal is for the circuit to operate at less than 1 V. The final limit will depend on the device process level that determines the smallest size of the device. Low-power circuits are still the subject of intensive investigation and research, and reducing power consumption while improving performance will be the goal they strive to achieve.
System designers must have the ability to achieve higher circuit performance with limited power metrics, in addition to meeting basic system performance metrics requirements, cost targets, and time-to-market requirements. However, designers still need to carefully analyze the power profile of all components in the system. New tools and techniques for optimizing power designs help improve the design environment and make the designer’s job easier.
