THE ULTIMATE GUIDE TO XILINX FPGA, SERIES, AND ALL DETAILS

The field-programmable gate array (FPGA) market grew from over USD 5 million in 2019 and is expected to grow to about USD 7 million in 2022. Market forecast further shows the market could grow to about USD 12 million by 2028 with a compound annual growth rate (CAGR) of 10.4%.  Also, this statistic favours Xilinx FPGA as the largest global manufacturer of FPGA, with a 36% revenue share in 2018.

But how is the Xilinx FPGA relevant to the revolution of tech? We took the time to compile all answers to your question on it on the following:

• What Is A Field-Programmable Logic Array?
• Why Use Programmable Logic Gate Arrays?
• Xilinx FPGA. 
• The Xilinx Spartan And Its Family
• The Xilinx Artix 7
• Xilinx Kintex 7 And Ultrascale
• Xilinx Virtex And Its Family

WHAT IS A FIELD-PROGRAMMABLE LOGIC ARRAY (FPGA)?

A field programmable logic array (FPGA) is an integrated circuit (I.C) reprogrammable by the user. The integrated circuits of FPGAs comprise configurable logic blocks which can be interconnected via software programs. These programs allow designers to connect different blocks by using or interchanging logic controls to understand the device’s performance.

 WHY USE FIELD-PROGRAMMABLE GATE ARRAYS?

Designers prefer the field-programmable gate logic to application-specific integrated circuits (ASICs) because of their versatility. However, more advanced applications allow the complementary use of ASICs with FPGAs. The following reasons show why designers prefer FPGAs;

• Hardware Prototyping: It is essential to iterate design with different hardware components in electronic design. Using FPGAs makes it easy to test different components on the hardware without changing the physical structure of the circuit board components.
• Non-Recurring Engineering Cost: There are ready-made FPGAs in the market. Hence, designers can decide to burn their hardware description language (HDL) code onto the FPGA. 
• Minimal Market Time: As explained earlier, the absence of design layout/ mask is an advantage as FPGAs are reprogrammable by the user.

THE XILINX FPGA

As shown in the opening paragraphs, Xilinx FPGA is the largest manufacturer of field-programmable gate arrays and tops the list of 8 other manufacturers. One reason why designers prefer Xilinx FPGA is because it combines the software programmability advantage of the processor with the hardware programmability of the FPGA while doing all of these with minimal cost.

THE XILINX SPARTAN 

The primary purpose of the Xilinx FPGA Spartan family is to produce a cost-friendly FPGA for consumer electronics. The Spartan family has also become an integral part of everyday electronics in different fields like medicine and automotive industries etc., while it’s also LED signage-friendly. The debut spartan  was first designed in 1998 and had the following significant advancements;

• Increased performance
• Local memory increases.
• Improved bandwidth i/o.
• Better logic density.
• 1862 maximum Logic Cells.
• 80MHz clock speed.

XILINX SPARTAN 2

The Xilinx Spartan 2 comprises six-family members. The lowest member has a system gate density of 15,000, while the highest member has 200,000. System performance provides up to 200MHz with fast interconnects. The Spartan 2 boasts of 4 major features viz;

• A 56k bits block RAM.
• A distributed RAM of 75,264 bits.
• Four Dynamic library links (DLLs).
• 16 input/output standards.

FEATURES OF THE XILINX SPARTAN 2 VERSION OF XILINX FPGA

• System Level Features: An advancement in FPGAs’ electronic design methodology cannot be discussed without considering its system level. Therefore, the Xilinx Spartan 2 family caters for such system-level needs such as;

• Cascade chain for wide input functions.
• Low-power segment routing architecture.
• Select RAM+ hierarchical memory ( Fast interfaces to external RAM, Configurable 4k bit block RAM, 16 bits/LUTs distributed RAM).
• Complete peripheral component interconnects (PCI) compliant.
• Four dedicated DLLs are used for advanced clock control.

• Second Generation ASIC replacement technology: The ASIC technology’s drawbacks range from development time to cost to flexibility. The Xilinx Spartan FPGA 2 addressed all these drawbacks viz;
  • High densities up to 5,292 LCs with up to 200,000 system gates.
  • Low cost.
  • Unlimited re-programmability.
  • Streamlined features based on the Virtex architecture.
  • An advanced 0.18-micron process.

• Supported By The Powerful Xilinx development System;
  • Alliance Series: Allows usage with third-party tools.
  • Full automatic routing, mapping, and placement.
  • Foundation Series: Complete integrated Software.

• Input/Output Versatility And Packaging;
  • A zero minimal hold time to simplify system timing.
  • A PCI friendly and hot-swap compact i/o system.
  • 16 high-performance interface standards.
  • Family footprint compatibility in common packages.
  • Low-cost packages are available in all densities.
  • Lead-free package options.

XILINX SPARTAN 3

The Xilinx Spartan 3 is significant for integrating the Accel-FPGA device and the Xilinx Virtex-E FPGA in the system hardware. The two hardware devices use a programmable logic (PLC) controller unit for interconnection.

FEATURES OF THE XILINX SPARTAN 3 FPGA

• Memory: The Xilinx Spartan 3 FPGA allows a RAM module that aids memory storage from the Xilinx of core memory storage or library. Thus, the RAM block sits between the processor and the SRAM blocks by physical configuration. This arrangement makes it possible for the RAM block to act as a memory block.
• On-Board Memory Devices: The essence of the onboard memory is to cater for faster design implementation. This setup allows designers to use the Xilinx ISE for device configuration and verification.
• High Design Predictability: The Xilinx Spartan 3 FPGA allows designers to predict circuit performance. This is to reduce overall design time wasted on redesigning a design.

XILINX SPARTAN 3A FPGA

The Xilinx Spartan 3A FPGA carries a fully optimised i/os, ranging from about 195 to 375 I/Os with comparable minimal cost. It also features about 4 devices with a system gate ranging from 200 to 1.4 million with applicable density migration. This type of FPGA is suitable for comprehensive I/Os electronic operations.

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FEATURES AND BENEFITS OF THE XILINX SPARTAN 3A FPGA

• Strong Anti-Cloning Security For FPGAs: The Xilinx Spartan 3A FPGA is the world’s first anti-cloning security designed for low-cost FPGAs and stands out for the following reasons;
  • Algorithm Customization: This feature allows designers to have their unique algorithms and detect responses to design failure.
  • Specialized Device DNA Serial Number: Xilinx assigns A 57-bit digit to the device to prevent design cloning, reverse engineering, and overbuilding by an unauthorised third party.
  • Protects software and hardware IPs.

• Worlds FPGA Lowest Total Cost: The Xilinx FPGA isn’t the largest FPGA manufacturer for nothing. It achieved such a feat because of cost-effectiveness and high-performance FPGA with the following benefits:
  • System multipliers enable effective DCMs for clock management use.
  • Provides a large pool of selection of device/package options.
  • Enables the use of fewer design components.
  • Better detailed IP library in the FPGA industry.
  • Eliminates external system components which breed system reliability.

• Comprehensive Support For Automotive Requirements: The Xilinx Spartan 3A FPGA meets the European standard of hazardous substances (RoHS) restriction with its lead-free packaging. It also provides an enhanced temperature range with Xilinx FPGAs available in the automotive industry.

XILINX SPARTAN 3E VERSION OF XILINX FPGA

Xilinx Spartan 3E FPGA is for designers whose design is logic gate-centred while prioritising cost and overall performance. This Xilinx FPGA family supports gates from 100k to 1.6 million. It also supports I/Os features of 66 to 376 I/Os with system density migration. Xilinx Spartan 3E finds application in video and graphics and automotive networking. However, the Xilinx Spartan 3E family shares striking similarities with the Xilinx Spartan 3A family, as shown below;

• Both support Device DNA security.
• Embedded processing.
• Two power management modes.
• Configurable Logic Blocks (CLBs)
• Both support 4 multilevel memory architectures.
• Specific clock management resources.
• Leading connectivity problems.

XILINX SPARTAN 3AN

This Xilinx Spartan family is an extension of the Spartan 3A capabilities to include one more memory configuration. The Spartan 3AN now includes the serial peripheral interface (SPI), the SPI memory, the configured onboard flash and the onboard flash memory. The onboard flash supports the storage of configuration data.

FEATURES AND BENEFITS OF THE XILINX SPARTAN 3AN

• Non Volatile and SRAM-based FPGA.
• A comprehensive low-cost platform.
• Biggest on-chip user flashes in the FPGA industry.
• Overall standard I/O support.
• The first 90nm FPGA supports electronic numbering.

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XILINX SPARTAN 5 

The Xilinx Spartan 5 solves the processor heating problem. The heat pipes connect the processor and offer high-efficiency cooling for all types of processors. The Xilinx spartan 5 runs on fluctus 120. This provides a noiseless operation.

ADVANTAGES OF THE SPARTAN 5

The Xilinx spartan 5 has the following advantages;

• Improved processor installation for up to 4 times faster.
• Supports a dense heat sink system.
• Improved speed curve of processor fan for noiseless operation.
• Improved RAM module compatibility.

XILINX SPARTAN 6

Unlike the previous spartan versions, which are function-specific depending on the developers’ needs, the spartan 6 is an FPGA advancement that handles the drawbacks of the previous versions. Spartan 6 finds huge applications in video and graphics with high resolutions, industrial networks, and vehicle networking. For example, the Xilinx Spartan 6 supports high connectivity features such as;

• Microblaze soft processor.
• Low-cost alternative to their ASICs counterpart.
• A sizable form factor.
• 147K LC density
• 6-input LUT.
• SDRAM memory controllers.
• High logic-to-pin ratio.
• Large numbers of input/output protocols.
• Support complex bridging applications in user electronics.
• An enhanced mixed-mode clock management block.
• Improved power consumption while retaining high connectivity.

FEATURES OF THE XILINX SPARTAN 6

BOM COST REDUCTION

• System I/O expansion while remaining cost-effective.
  • Support MicroBlaze processor soft IP while eliminating external processor.

PROGRAMMABLE SYSTEM INTEGRATION

• Improved logic-to-pin count ratio for system connectivity.
  • PCI express carries an integrated endpoint block.
  • Up to 40 input/output standards for streamlined system design.

FASTER DESIGN PRODUCTIVITY

• Improved design closure using system integrated wizard.
  • ISE design suite-enabled (a no-cost, front-to-back FPGA design for Windows and Linux.

IMPROVED POWER CONSUMPTION

• On power-down hibernate mode, the system consumes zero power.
  • Dual-core voltage option to choose from (1V or 1.3V).

INCREASED SYSTEM PERFORMANCE

• DDR3 integrated memory controller with a frequency of 800MB/s.
  • The serial transceivers run up to 8 low-power 3.2GB/s.

XILINX SPARTAN 7 

In 2020 Xilinx recorded a sales milestone of over 1 billion for Xilinx spartan family sales. This showed its superiority over other FPGAs in the industry. The Spartan 7 runs on the small form factor, the MicroBlaze soft processor running on over 200DMIPs, and DDR3 support built on a 28nm HPL mature process running on 800MB/s frequency. There’s also a significant change in power consumption in the Spartan 7 compared to the Spartan 6.

SPARTAN 7 APPLICATIONS

• Adaptive LED lighting system.
• Machine vision interfacing.
• Single-axis motor control.
• Automotive data format/ standard conversion.
• Cryptographic engine for V2X applications.

FEATURES OF XILINX SPARTAN 7

• HIGH LOGIC TO I/O RATIO: The Xilinx Spartan 7 has a better logic to i/o ratio with minimal cost compared to previous spartan generations. The spartan 7 integrates a complex system with a small package size of 8nm while keeping board power consumption sizable.
• IMPROVED PERFORMANCE
  • Improved DSP and CLB architecture.
  • Enhanced block RAM and about 30% increase in system clock frequency.
  • The number of logic resources ranges from 6,000 to 102,000.
  • A peak DDR3-800 memory bandwidth of about 25.6 GB/s with a soft memory controller.
  • About 1.25 GB/s LVDS.

• CONSUMPTION POWER REDUCTION
  • The spartan 7 has an approximate 50% power reduction compared to the 45nm equipment.
  • Spartan 7 uses a high dielectric metal gate to achieve high performance with low power consumption.
  • Dual-core voltage option of either 1V or 0.95V.

• REDUCTION IN BOM COST
  • Spartan 7 is pocket-friendly for system i/o expansion.
  • Uses XADC and SYSMON for combining discrete analog and monitoring circuitries.

• PROGRAMMABLE SYSTEM INTEGRATION
  • Enhanced integrated security and monitoring.
  • Sequences can be read through JTAG and its design is encrypted.
  • Supports Microblaze processor soft IP.
  • High i/o connectivity with improved pin count to logic ratio.

FASTER DESIGN PRODUCTIVITY

Uses Vivado HLx design suite web pack, which allows design reuse of the same system architecture.

Enhanced Vivado IP integrator using correct-by-construction block level design.

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XILINX ARTIX 7 FPGA

The Xilinx Artix 7 provides the best performance and cost-effective FPGA for signal processing, logic, embedded memory, transceiver line rate, AMS integration, etc.

XILINX ARTIX 7 APPLICATIONS

• Multi-protocol vision machine camera.
• Programmable logic controller (PLC).
• Battery-powered software-defined radio.
• 64 channel portable ultrasound.
• Wireless backhaul: point-to-point 1024 QAM microwave modem.

XILINX ARTIX 7 FEATURES

• REDUCTION OF BOM COST
  • Up to $5 savings on analog components while using small wire bond packaging.
  • Chip-scale bond packaging.

• PROGRAMMABLE SYSTEM INTEGRATION
  • Support analog mixed-signal integration and AXI IP.
  • Sub-watt performance with a range from 13k to 215k LCs.

• TOTAL POWER REDUCTION
  • 50% total power reduction and about 65% lower static power against the 45nm devices.
  • Lowest power speed grade offering (-1L).

• ACCELERATED DESIGN PRODUCTIVITY
  • Allows for easy architecture scaling for subsequent designs.
  • Scalable, comprehensive IP tools.

• BETTER SYSTEM PERFORMANCE
  • Up to 16 X 6.6G GTs and a 930 GMAC/s.
  • 13MB BRAM, 1.2GB/s LVDS and DDR3-1066.
  • 5.7 times more DSP slices than the previous spartan 6.
  • Include SODIMMs support.

XILINX KINTEX 7

The Xilinx Kintex 7 is unique because of its 28nm architecture. The design consumes the lowest power of the Kintex family with a 50% power reduction. It is also cost-effective while maintaining optimum performance.

XILINX KINTEX 7 APPLICATIONS

• LTE-based solutions.

• Avionics

• Backlit flat panel display with LED and 3D tv.

FEATURES OF XILINX KINTEX 7

• Improved block memory with enough DSP resources.

• Support serial connection of up to 10.31 GB/s

• Enhanced LC of up to 148K, AMS integration, AXI IP, and VCXO components.

• 50% price reduction for a similar 40nm density.

• Support architecture scalability in case of reuse.

 XILINX KINTEX ULTRASCALE

The Kintex Ultrascale adopts the ASIC-class type of performance, power management, and clock management with next-generation 20nm. It supports prompt packet processing in 100G networks and data centre applications.

APPLICATION OF THE KINTEX ULTRASCALE

• Remote radio head DFE 8X8 100MHz TD-LTE radio unit.
  • 256 channel medical ultrasound image processing.

FEATURES OF THE XILINX  KINTEX ULTRASCALE

• Supports next-generation routing for rapid time closure.
  • Better footprint compatibility with Xilinx Virtex ultrascale devices to allow for easier reuse.
  • Supports up to 2-speed grades with high utilisation.
  • Up to 2,400 MB/s DDR4 within a mid-space range for improved performance.
  • Provides about 40% lower power compared to previous generations—application BOM cost reduction by 60%.

XILINX VIRTEX FPGA

The Virtex FPGA is another innovation from Xilinx comprising different configurations and models. The Virtex family use CLBs where each CLBs equals ASIC gates and has multiple slices with unique construction architecture.

XILINX VIRTEX 2

 The Xilinx Virtex 2 design caters to high-performance functions which operate from low to high-density designs. It supports a CMOS-8 layer metal which is low-power efficient and aids optimum speed operations. 

APPLICATIONS OF THE VIRTEX 2

• Best for wireless networking.
  • Used for telecommunication, video applications and DSP.

FEATURES OF XILINX VIRTEX 2

• Supports up to 12 DCM blocks to eliminate distribution delays in clock frequency.
  • Available DES decryption.
  • Supports a programmable I/O block with a DDR register for I/O configuration.
  • Allows data loading onto internal configuration memory.

XILINX VIRTEX 4

The Xilinx Virtex 4 is an integration of different flexible features with an advanced silicon modular block (ASMB). This feature makes it a better ASIC alternative for developers. With this family, one can choose between the SX, LX and FX to suit design needs.

XILINX VIRTEX 4 FEATURES

• Allows up to 78% lower static consumption of power and 94% start power in-rush.
  • Better system reliability at great cost.
  • Supports 90nm technology.
  • Allows for choice selections from the 3 variants.

XILINX VIRTEX 5

The Virtex 5 operates on a 65nm with high enough density for PCI express endpoint and ethernet MAC blocks available in 3 modes. The design combines an increased performance, design simplicity, plus fast time to market in a single chip. The Virtex 5 finds application in areas such as;

• Backplane switches.
• Routers application.
• Traffic management solutions.
• Aerospace and defence applications.

FEATURES OF THE XILINX VIRTEX 5

• Supports 4 LUTs and 4 flip-flops against the previous, which had 2 each.
  • Up to about 207,360 clock-enabled flip-flops.
  • Each DSP48E slice has a 25 X 18 multiplier, accumulator, and adder.
  • Supports up to about 330,000 LCs.
  • A clock management tile with 500MHz clocking.
  • Packaging is tough for improved durability.

XILINX VIRTEX 6

The Xilinx Virtex 6 combines a better-secured performance, rugged packaging and an anti-tamper device. This hybrid version integrates high-performance DSP designers, high-speed transceivers, and soft microprocessor capabilities with high logic capabilities. 

FEATURES OF XILINX VIRTEX 6

• Advance DSP4E1 slice capabilities.
  • Improved flexible options for configuration.
  • Third-generation anti-tamper.
  • Improved cost with 50% power reduction against the Virtex 5.
  • Support mask set control.40nm copper CMOS technology.
  • Better routing efficiency.

XILINX VIRTEX 7

The Xilinx Virtex 7 is the latest Virtex family designed with optimised functionalities. The Virtex 7 combines a 28nm technology with stacked silicon interconnect (SSI). This advancement allows for better performance per watt fabric and improved DSP and I/O bandwidth performance. 

APPLICATIONS OF VIRTEX 7

• 24-channel portable radar beamformer.
  • 100GE line card.
  • 10GPON/10GEPON OLT line card.

FEATURES OF THE VIRTEX 7

• BOM cost reduction up to 40% for multi-chip solutions.
  • Supports up to 70% lower power for multi-chip solutions.
  • Supports 2 million LCs, VCXO components, AXI IP, and AMS integration.
  • An optimised architecture that is expandable for future purposes.
  • Supports up to 2.8 TB/s total serial bandwidth with up to 96 X 13.1GTs, up to 16 X 28.05G GTs, 5, 335 GMACs, 68MB BRAM, DDR3- 1866.

Basic Introduction About Xilinx Artix 7 FPGA

CONCLUSION

This article has shown in its simplest form why Xilinx FPGA is still the best FPGA manufacturer. Xilinx FPGA has been providing consumers with cost-effective, high-performance FPGAs.

FREQUENTLY ASKED QUESTIONS

Q: Is the ISE webpack design software free?

A: YES. It is the only free webpack design software in the industry.

Q: How much does the Xilinx IP cost?

A:  You can contact us for quotes via our website.

Q: Can new users use the Xilinx ISE to compile designs on their own?

A: YES. Xilinx provides a tool kit to help new users start their designs independently.