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XC2S50E-6PQG208C Spartan-IIE 1.8V FPGA XC2S50E Spartan-IIE 1.8V FPGA starter kit

XC2S50E-6PQG208C ApplicationField

-Industrial Control
-Artificial Intelligence
-Consumer Electronics
-Wireless Technology
-Medical Equipment
-Internet of Things
-Cloud Computing
-5G Technology

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XC2S50E-6PQG208C FAQ

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XC2S50E-6PQG208C Features

– Unlimited in-system reprogrammability
• Second generation ASIC replacement technology
– Very low cost
• System level features
– Cost-effective 0.15 micron technology
– SelectRAM hierarchical memory:
– Densities as high as 15,552 logic cells with up to 600,000 system gates
· 16 bits/LUT distributed RAM
· Configurable 4K-bit true dual-port block RAM
                                               
– Streamlined features based on Virtex-E FPGA architecture

 

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XC2S50E-6PQG208C Overview

 

The Spartan®-IIE Field-Programmable Gate Array family gives users high performance, abundant logic resources, and a rich feature set, all at an exceptionally low price. The seven-member family offers densities ranging from 50,000 to 600,000 system gates, as shown in Table 1. System performance is supported beyond 200 MHz.Features include block RAM (to 288K bits), distributed RAM (to 221,184 bits), 19 selectable I/O standards, and four DLLs (Delay-Locked Loops). Fast, predictable interconnect means that successive design iterations continue to meet timing requirements.The Spartan-IIE family is a superior alternative to mask-programmed ASICs. The FPGA avoids the initial cost, lengthy development cycles, and inherent risk of conventional ASICs. Also, FPGA programmability permits design upgrades in the field with no hardware replacement necessary (impossible with ASICs).Table 1: Spartan-IIE FPGA Family MembersDeviceLogic CellsTypical System Gate Range (Logic and RAM)CLB Array (R x C)Total CLBsMaximum Available User I/O(1)Maximum Differential I/O PairsDistributed RAM BitsBlock RAM BitsXC2S50E1,72823,000 – 50,00016 x 243841828324,57632KXC2S100E2,70037,000 – 100,00020 x 306002028638,40040KXC2S150E3,88852,000 – 150,00024 x 3686426511455,29648KXC2S200E5,29271,000 – 200,00028 x 421,17628912075,26456KXC2S300E6,91293,000 – 300,00032 x 481,53632912098,30464KXC2S400E10,800145,000 – 400,00040 x 602,400410172153,600160KXC2S600E15,552210,000 – 600,00048 x 723,456514205221,184288K 
The Xilinx FPGAs series XC2S50E-6PQG208C is 50,000 SYSTEM GATE 1.8V FPGA – NOT RECOMMENDED for NEW DESIGN, View Substitutes & Alternatives along with datasheets, stock, pricing from Authorized Distributors at EBICS.com,
and you can also search for other FPGAs products.

XC2S50E-6PQG208C Tags

Xilinx XC2S50E
Xilinx Spartan-IIE 1.8V FPGA development board
XC2S50E development board
Spartan-IIE 1.8V FPGA evaluation kit
Spartan-IIE 1.8V FPGA starter kit
XC2S50E reference design
Spartan-IIE 1.8V FPGA XC2S50E
XC2S50E-6PQG208C Datasheet PDF

XC2S50E-6PQG208C TechnicalAttributes

-Number of I/O 146
-Number of Gates 50000
-Operating Temperature 0℃ ~ 85℃ (TJ)
-Total RAM Bits 32768
-Supplier Device Package 208-PQFP (28×28)
-Number of LABs/CLBs 384
-Number of Logic Elements/Cells 1728
-Mounting Type Surface Mount
-Voltage – Supply 1.71V ~ 1.89V
-Package / Case 208-BFQFP
-Mounting Type Surface Mount

 

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