This blog post reviews the SOIC Integrated Circuit (IC) package. As one of the popular packages for circuit boards, it has several variants that come in handy when working on different projects.
If you have always wanted to know what the SOIC is and how it works, this article is for you.
What is SOIC?
SOIC stands for Small Outline Integrated Circuit package. As the name signifies, it is compact and therefore, makes a perfect fitting for applications requiring a smaller circuit board footprint.
The Smaller Outline
The smaller outline of the SOIC is derived from the limited spacing. Wikipedia estimates the space to be up to 50% less than the traditional Dual In-Line Package (DIP).
The compact design of the SOIC is also tenable via its narrow path, the limited pin counts and its compressed body size. The body size compression is one of the reasons why the SOIC can accommodate the tightened lead pitch and considerable fitting of the semiconductor components.
MSL Reliability
Moisture Sensitivity Level (MSL) is an important consideration when working on a circuit board. It has to do with the level of exposure levels of the circuit board and how the board can stay “afloat” despite that.
SOIC meets that requirement as the roughing of the lead frame helps to improve the capability and reliability of the package’s Moisture Sensitivity Level (MSL).
Several Seals
Sealing the package helps to keep the components safer. Using the right sealant makes all the difference.
Designers have a variety of sealing options to pick from, including epoxy, solder and glass seals.
Thermal Enhancement
By default, the SOIC has an exposed die pad, denoted with the suffix, “EP.” The major role the EP plays is to balance the thermal or heat dissipation capabilities of the circuit board via the direct soldering to the Printed Circuit Board (PCB).
Rest assured of deriving an improved thermal capability from the package not just because of the transfer of heat from the package to the circuit board. The improved thermal capability is also possible because of the low thermal resistance, derived from the improved die attach technology.
The SOIC’s exposed pad (EP) also acts as the “ground connection” or the heatsink for the IC package. Through that pathway, the target applications would effectively manage their heat dissipations.
Small Outline Integrated Circuit (SOIC) package also has a dedicated thermal property called the Enhanced SOIC. Denoted with the alphabet “e” at the end of the package, the function is to further optimize the IC package for applications, requiring higher current and power capabilities.
Lead Formation
The leads of the SOIC are formed in the form of a gull wing shape. The leads used here protrude or come out from the longer edge or part of the SOIC package.
One of the highlights of the gull wing leads is the ideal optimization for products or applications built with the following technology – SMT.
Surface Mount Technology (SMT) means the technology used for the placement of components atop the surface of the Printed Circuit Board (PCB).
Both the Small Outline Integrated Circuit (SOIC) package and the QFP are examples of the IC packages optimized with the SMT.
Working with the gull wing leads as seen on the SOIC can also be a guarantee of getting the best terminations on both the high pin-count and fine-pitch applications.
Terminal Direction
Small Outline IC package is best described as a “2-way IC package” because of the direction its terminal uses.
The terminal takes on the ‘L” shape and that is one of the reasons for the package’s dual directions or configurations.
SOIC Standards
There has been a bit of uncertainty over the actual standard used by the SOIC. Both the JEDEC and the JEITA standards are in use. So, it can be confusing to decide on the best among the two.
We are going to break down these two standards so you understand how they work. First, we like to point out that the standards are country-specific.
The JEITA standard means Japan Electronics and Information Technology Industries Association. It is a standard used by the Japanese trade organization to rate the performance of both the IT industries and specific electronics.
On the other hand, the JEDEC standard means JEDEC Solid State Technology Association. Headquartered in the United States, JEDEC helps to regulate the semiconductor market, especially by overseeing the Electrostatic Discharge (ESD) standard and the standardization of the semiconductor part numbers.
The major difference or the best way to identify between a JEDEC and a JEITA SOIC is by comparing the sizes. The JEDEC SOIC is usually larger or heavier than the JEITA SOIC standard.
The other difference between the two is that the JEDEC standard is common for SOIC manufactured in the United States and the JEITA is for Japan’s SOIC.
Form Factor
Saving space is one of the attributes of a Small Outline Integrated Circuit (SOIC) package. We can find variants of the package that have smaller footprints.
An example is the Thin-Shrink Small Outline (TSSOP) IC package, which tends to “shrink” or dramatically diminish the size of the package.
There is also the Thin Small Outline Package (TSOP), which has more space than the TSSOP does.
Plastic Packaging
SOIC is a plastic-molded or plastic-encapsulated Integrated Circuit (IC) package, and therefore, suitable for applications demanding an optimum performance in their IC packaging.
Affordability
SOIC is also ideal for applications requiring low-cost solutions, especially devices for beginners in the Printed Circuit Board (PCB) construction niche.
SOIC Runs in Higher Volumes
The compact size notwithstanding, the Small Outline IC package still runs multiple volume options. Pick from any of the variants with a higher pin count to derive the highest number of volumes, per application.
Varied Body Widths
SOIC uses a minimum of 0.50-inch lead spacing, ensuring that the leads or pins are spaced enough.
It also has varied body widths, ranging from narrow and wide. The wide body widths range from 300 mils or 7.5 millimeters (mm). The narrowed body widths range from 150 mils or 3.8 millimeters.
Final Words
SOIC’s 2-way direction IC package design helps designers to place the components strategically with the SMT technology and maintain an excellent thermal performance.
