Configurable devices like Field Programmable Gate Arrays (FPGAs) are popular because of the reconfigurations. Yet, we must mention that depending on the circumstance, reconfiguring these devices can be problematic. In some cases, the static design of the integral logics makes it almost impossible to modify the original designs of the devices.
However, you may have a chance at doing that if you are working with the DRP. This article explains what the DRP Xilinx means and how it can influence the logic reconfiguration process.
What is DRP Xilinx?
The full name is Dynamic Reconfiguration Port (DRP). It is a dedicated DRP used by Xilinx (now a part of AMD) to reconfigure logic-based devices.
How does the DRP Xilinx work, you may ask? It works by using a dynamic reconfiguration process to make relevant changes to the original design of a logic-based device. One of the reasons for using the DRP Xilinx is because of the static design of some logic elements, which make it almost impossible to reprogram the targeted devices.
Supported Logic Elements
The DRP Xilinx is primarily used to reconfigure certain logic elements, especially those manufactured by Xilinx/AMD.
Here is a list of some of the supported logic elements due for reprogramming with the DRP Xilinx:
- Several transceivers, including MGTs, MMCMs, XADCs, GTXs, PLLs, GTHs, DCMs, GTPs, and PCI Express integrated blocks.
Design Architecture of the DRP Xilinx
Digital circuit designers looking to shorten the time to market often turn to DRP Xilinx. It combines both the firmware and hardware architecture, thus, making it a dual platform for reprogramming these logic-based devices.
First, the firmware of the targeted application is built with the C programming language. Thereafter, it is added to the integrated circuit board development platform.
Second, the DRP will made into a hardware by implementing the firmware into it. Once the hardware status has been confirmed, the DRP Xilinx will then be due to run on a machine.
Attributes of the DRP Xilinx
Here are some of the features you get to see when working with the DRP Xilinx:
1. Logic Packing
To simplify the logic reconfiguration process, the DRP Xilinx’s design allows for what is called logic packing. It means that these relevant logic elements needed for the reconfiguration have to be “packed” or placed within the same slice.
Also, the logic elements must also be placed within the same partition, to help simplify the reconfiguration.
2. Firmware Rewriting
The firmware needed to rewrite the logic devices must be rewritten. To do this, the C-based design or programming language must be implemented in the DRP for it to be used to make the DRP into a hardware.
With the hardware now ready, the DRP Xilinx can be used to produce or reprogram hardware required for both the complicated and advanced processing.
3. Turning Output Clocks into Register Bits
Conventional output clocks are defined via the values and input pins. When it comes to the DRP Xilinx, the process changes. This time, the output clocks are turned into register bits as a way of making these bits an active logic element of the circuit design.
DRP Xilinx makes it easier to reconfigure “tough” devices. Now, you can leverage it to bolster the performance of reconfigurable devices, especially those whose designs could not start until all the specifications are defined.