Our Latest News

Design and Implementation of Indirect Current Mode Instrumentation Amplifier Architecture

In applications such as electromagnetic flow meters and bioelectric measurements, small differential signals are coupled in series with much larger differential offsets. These offsets typically limit the gain available to the circuit in the front-end design, which in turn affects the overall dynamic range. Gain limiting is even more challenging when using lower supply voltages, such as in a battery-powered signal chain. One solution to this large differential offset problem is to use an AC-coupled measurement signal chain. A typical AC-coupled signal chain includes a low-gain instrumentation amplifier followed by a high-pass filter and additional gain stages (see “Amplifying AC Signals with Large DC Offsets to Support Low-Power Designs”).

In most applications, it is desirable to obtain as much gain as possible in the first stage, as this helps to improve the fold-to-input (RTI) noise of the other gain stages in the signal chain. This paper will describe the design and implementation of an indirect current-mode instrumentation amplifier architecture that results in high gain and AC coupling in one stage. The design uses a micropower, zero-drift instrumentation amplifier, the AD8237, which has a wide common mode and differential input range. Other examples of indirect current mode architectures are the AD8420. the key benefits of this indirect current feedback include.

Low power architecture

No diamond diagram limitations like other typical architectures (e.g., instrumentation amplifiers consisting of two or three op amps)

Good gain drift performance can be achieved with external resistor matching

High CMRR without relying on resistor matching

High impedance reference pins

The circuit shown in Figure 1 provides the overall schematic in which the indirect current-mode instrumentation amplifier AD8237 is selected; however, in order to achieve high gain and AC coupling in one stage, an integrator circuit must be implemented in the feedback loop of the AD8237. This solution provides greater gain than instrumentation amplifier solutions consisting of two or three op amps, which eliminate the offset after applying the gain. For the proposed architecture, the offset correction occurs before the gain stage, so the instrumentation amplifier can have a larger gain. Both architectures are described in the appendix. the ADA4505 op-amp is used as an integrator circuit in the feedback loop. the output of the AD8237 is detected by the integrator input and drives the reference pin of the AD8237, forcing the output of the AD8237 to be VMID, which is set at the positive input of the ADA4505. Even if the integrator circuit provides a low-pass filter function, in this case the overall circuit will have a high-pass filter conversion function due to its use in the feedback loop. Due to this behavior, it not only ends up blocking any DC offset before applying gain, thus providing greater gain than other solutions, but it is more helpful for low supply voltages and large offsets because the remaining operating margin is very limited. The integrator circuit also forces the output of the AD8237 to the selected voltage via the reference pin. In effect, the integrator forces the voltage of the reference pin relative to the FB pin of the AD8237 to equal the differential voltage of the input, but in the opposite direction.

Design Specifications Example

Low-power applications typically use a single supply, with supply voltages typically between 1.8 V and 3.6 V. The design choices for the circuit shown in Figure 1 depend on the input signal and the amplitude range and frequency of the offset. Table 1 lists example design specifications for the circuit shown in Figure 1.

The design choices for this circuit were made with the AD8237 using a low bandwidth mode for increased gain flexibility and stability.

Figure 1. AC-coupled signal conditioning circuit using indirect current mode architecture

Table 1. Key design specifications for the circuit shown in Figure 1

Design Description

The circuit shown in Figure 1 consists of the micropower, rail-to-rail instrumentation amplifier AD8237 and the zero-input crossover distortion operational amplifier ADA4505. Both devices can be powered from a minimum 3.3 V supply, VDD.

This circuit outputs a voltage VOUT, which represents the input AC signal VSIGNAL after removing the DC offset voltage VOFFSET and amplifying the signal. The VMID voltage generated by this circuit is used to set the positive input of the ADA4505 and the AD8237 gain stage output common-mode to an intermediate supply voltage.The VMID is generated by a voltage divider (R1, R2) and buffered by another ADA4505.The AD8237 is available in an ultra-small package (MSOP) and the ADA4505 is available in a compact wafer-level chip scale package (WLCSP ).

Design Considerations

  1. The positive input VMID of the ADA4505-2 (1/2) will set the value of VREF (reference pin of the AD8237) and thus the output VOUT Given the common-mode input voltage versus output range or diamond diagram, the optimal value for most instrumentation amplifiers is the intermediate supply voltage (+VDD/2) to ensure maximum output swing between the two supply rails. A helpful diamond diagram tool for this purpose is presented in the design simulation section. 2.
  2. The choice of resistor values R1 and R2 is also important when considering the total supply current of the circuit. The resistor selection is the result of a trade-off between noise and power consumption. For this circuit, it is best to choose a larger resistor value to minimize the additional supply current. For this resistor divider, the additional supply current added would be

For resistive dividers (R1, R2), a capacitor C1 can be added to band limit the noise and reduce 50 Hz/60 Hz or other interference to VDD. The larger the capacitance, the better the noise filtering; however, the VMID takes longer to stabilize at power-up. The time required to build up to within 1% is estimated to be

  1. When selecting passive component values (resistors and capacitors), the tolerance should be considered. For resistive dividers (R1, R2), the target VMID value may move, which can affect the output swing range VOUT of the AD8237 and ADA4505.

As can be seen from the circuit shown in Figure 1, the conversion function will have two cutoff frequencies, which are the result of the high-pass filter from the ADA4505 integrator circuit in the feedback and the low-pass filter response due to the bandwidth of the AD8237. This may introduce some gain error that is related to the cutoff frequency of the integrator (ADA4505) and the AD8237 bandwidth. Therefore, the high-pass cutoff frequency and low-pass cutoff frequency shall have a certain range. Depending on how close the cutoff frequencies are to each other, the gain error percentage may change.

If the application requires the use of a high impedance sensor, a buffer such as the ADA4505 can be used before the AD8237 input to provide higher input impedance and lower input bias current, as the buffer converts the high impedance input to a low impedance output. The AD8237 has a maximum input bias current of 1 nA over the entire temperature range.

Design Steps

  1. Voltage divider for setting VMID.

For the circuit in Figure 1, set the value of the peripheral components to R1 = R2 = 1 MΩ to keep the contribution of the supply current around 1 μA according to point 2 of the “Design Notes”.

Output of the resistive divider prior to the ADA4505.

Assuming a 5% tolerance for R1 and R2, and taking into account the ADA4505 offset.

To eliminate AC supply interference and noise from the resistor, set C1 so that the cutoff frequency is at least less than the VSIGNAL minimum frequency of 20 Hz. Note that the capacitance value can be larger if further band limiting for noise is required.

In this case, C1 is set to 22 nF, which provides the frequency of

  1. Instrumentation amplifier (AD8237) gain value VSIGNAL:

Consider an electromagnetic flow sensor output that typically ranges from ±75 μV to ±6 mV peak-to-peak signal amplitude. For the circuit shown in Figure 1, the amplitude peak-to-peak signal amplitude range would be set to VSIGNAL = 6 mV peak at 30 Hz.

Then, consider the limits of the AD8237 output swing range on the supply rails. These values can be found in the “Output Swing” section of the datasheet. To be conservative, we use the following RL = 10 kΩ swing case at +25°C.

For 3.3 V supply.

Since the output is fully differential, the worst-case output swing with respect to the VMID will be

For a positive input signal (VMIDMAX = 1.732 V):

For negative input signals (VMIDMAX = 1.568 V):

Now to set the gain, calculate the total expected differential input signal and set the maximum swing range using the lower limit of the positive and negative swing range as follows

Considering the output voltage range limitation, the AD8237 gain should be less than 253. To allow some margin for DC errors and other factors, the gain value of the circuit shown in Figure 1 should be less than the maximum value. There is also a trade-off between gain and build-up time: the higher the gain, the slower the time constant of the filter. Given these considerations, the AD8237 gain is set to 101.

Note the benefit of step 1 of the design considerations for maximizing the swing value.

From the datasheet, the relevant equation for gain is

The AD8237 datasheet provides suggested resistor values for different gain selections. For the selected gain 101, the values of these resistors should be: RF1 = 1 kΩ, RG1 = 100 kΩ.

  1. Instrumentation Amplifier (AD8237) Bandwidth.

From the datasheet, we know that the cutoff frequency value is

If the design specification requires some minimum attenuation for the maximum signal frequency, this is easy to check for a given filter cutoff frequency.

The closest standard capacitor value is chosen with a cutoff frequency of roughly 20 Hz, and C3 = 1.5 μF is set, so the updated cutoff frequency is

This is easily checked if the design specification requires some minimum attenuation of the minimum signal frequency for a

Design Simulation

To check the common-mode input range of the instrumentation amplifier versus the output voltage or diamond plot, you need to provide the supply voltage +VDD, reference voltage, gain, common-mode swing and differential input swing. ADI’s instrumentation amplifier diamond plot tool helps to understand if the input swing is within the operating range of the device. Note that the output swing used in this tool uses worst-case load conditions (minimum resistive load). Therefore, if you design to the tool’s limits, the system will have more margin for larger resistive loads. Viewing the results in Figure 2, the purple outline shows the available range of the AD8237 for a given supply voltage, output swing, input common-mode range, and device reference voltage. The red outline shows how much of the available range you are using for a given common-mode and differential input mode swing. The goal is to keep the red contour within the purple contour. If certain conditions violate this requirement, the tool will display an error and provide suggestions. Be sure to note that it is not possible to implement an integrator circuit in the feedback loop in this tool. However, there is a workaround, which is to configure the diamond diagram input signal as if the VOFFSET and VCM voltages (in Figure 1) of the circuit were added. This allows the use of intervals (0.65 V to 2.65 V) as the DC

    GET A FREE QUOTE

    FPGA IC & FULL BOM LIST

    We'd love to

    hear from you

    Highlight multiple sections with this eye-catching call to action style.

      Contact Us

      Exhibition Bay South Squre, Fuhai Bao’an Shenzhen China

      • Sales@ebics.com
      • +86.755.27389663