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An overview of different types of storage units and storage architectures for embedded MCUs

Memory technology does not stand still. Memory architectures change, and faster, more efficient architectures are created and used in successive generations, such as DRAM to SDRAM to DDR to DDR1, 2, 3, and so on.

  However, memory evolution is not just limited to architectural improvements. The underlying technology of the memory cell itself is improving all the time. Special processes and designs have been optimized for low power consumption, non-volatility, secure storage, or other special needs.

 This article looks at embedded MCUs with different types of memory cells and storage architectures, which are offered by several manufacturers and claimed to be superior to competing parts with traditional memory and architectures. This article will examine several options available to designers.

  To find the perfect cell

  Van Neumann, Harvard and RISC architectures all use non-volatile memory such as EPROM and Flash to store boot code and firmware. Most of the boot code is on the chip, but there are also ROM-less sections and will still use external OTP EPROM or flash memory. Both technologies provide dense, fairly low-power, low-cost field and factory programmable solutions for the firmware needs of microcontrollers.

  While traditional EPROM has given way to flash as the primary storage technology for decades, the quest has been to remove the barrier between volatility and rewritability. Ultimately, everyone is looking for a high-speed, non-volatile, low-power, rewritable, high-endurance battery that can be used anywhere.

  Happily, several good technologies have been developed that can produce the ideal cell structure we all want. However, it will take time for new storage technologies to make their way into modern microcontroller architectures. This is especially true when different manufacturing processes are required to make these special memory cells. Until yields are high enough, these parts will always cost a little more.

  Security is the driving force

  Code is especially valuable when proprietary algorithms or blocks of code provide a clear advantage to the design. When all code is stored in the microcontroller, it is difficult to enforce patents based on code infringement. Nonetheless, tools do allow for dumping of core memory, so encrypted code can be used.

  An encrypted block of code in external memory does not allow stray eyes to break it up in any usable form. the MCU contains a decryption algorithm with custom parameters that provide the seed for the pseudo-random function generator. You can’t easily decode the data unless you know the seed.

  This is the approach used in components such as the Maxim DS5000T-32-16+, a secure microcontroller based on the 8-bit legacy 8051 core. At its core is a battery-backed SRAM, which creates a “soft” security design. The internal code data is encrypted even when forced through its address sequence. 10 years of data retention specification will preserve the contents without power.

  Note how the firmware is not stored in ROM, EPROM or flash memory. Instead, 48-bit or 80-bit random decryption is applied to the incoming encryption code. The battery backed RAM even has a self-destruct mechanism if tampering is detected.

  Other modern style secure microcontrollers are available in swappable module format, such as the Maxim DS2250-64-16#. Note the dual batteries to ensure longevity. The entire microcontroller module, memory, cryptographic engine, and real-time clock can remain in state and continue to operate outside the system. This makes these MCUs ideal for secure key access, security and critical setup parameters, secret algorithms and processing techniques, filter coefficients, and more.

  The exchangeable security module with encrypted SRAM has a self-destruct feature that protects passwords and firmware as well as key parameters and security settings.

  New non-volatile battery structure Panasonic

  Exclusive technology with its ReRAM cells. The company has developed a new non-volatile memory structure that is based on a transistor-resistor core cell that uses tantalum oxide material in a special resistive layer. Using a common 0.18 µm CMOS process, the ReRAM cell can be reprogrammed to a low level of 1.8 to 3.6 V without having to use an internal charge pump to boot to a higher voltage. The rewrite time is also fast: 10 ns. Another key advantage is that, unlike many flash and EEPROM technologies, a cell does not have to be erased before it can be rewritten.

  Panasonic utilizes this technology in 8-bit cores such as the MN101L, E and C series, and 16/32-bit cores such as the MN103 L, S and H series, with performance levels from 10 to 120 MHz and C-optimized architectures.

  One benefit of ReRAM compared to flash technology is a 50% reduction in power consumption, thanks to a reduction in leakage current (Figure 2). Unlike flash or EEPROM, no intermediate data erase cycles are required, resulting in five times faster write times, says Panasonic. The endurance of ReRAM also increases to 100 Kcycles compared to the typical 10 Kcycles of flash memory.

Figure 2: According to Panasonic, ReRAM technology reduces the average current to a level sufficient to eliminate one of the cells.

  For example, a part like the MN101LR04DXW contains 64 KB of ReRAM and another 4K for the staging SRAM. 8-bit parts have a 16-bit internal architecture, including standard peripherals such as A/D (6-channel, 12-bit); I²C, UART, and DMA. with full 100K write endurance in the data area.

  A different technology comes from Renesas Electronics, which uses proprietary memory technology inside its microcontrollers to increase flexibility and reduce production time for mask ROM-based processors. An example part is the M37548G3FP#U0 using the company’s 8-bit internal 740 core running at 8 MHz. It is ideal for relatively small (20-pin, 15-I/O) simple (6 KB QzROM) embedded designs such as appliances, toys and entertainment. Its larger brother, the M37542F8FP#U0, takes it up to 64 KB in a larger 36-pin package with 29 I/Os.

  QzROM technology virtually replaces MASK ROM technology, significantly shortening development cycles and reducing power consumption (Figure 3). Like OTP and J-Tag in Flash-based microsystem programming, QzROM can be programmed after installation and is also tamper-proof to prevent unauthorized access. Production tools.

 Figure 3: Like flash and OTP, QzROM allows for development and very high-volume mask-like yields, but with significantly reduced latency for high-volume production compared to traditional mask technologies.

  Innovasic presents an innovative architecture in its RREM memory type for 66 MHz 32-bit Flexible Input Deterministic Output (FIDO) MCUs. Optimized for real-time communication applications and for various communication protocols, components such as the FIDO1100BGB208IR1 use what Innovasic calls Repositionable Rapid Execution Memory (RREM) memory cells. These are used to accelerate critical portions of code by mapping it to higher speed memory. the RREM is connected to the processor’s memory bus and looks like any other peripheral on that bus. the RREM’s memory cycle is reduced to 20 ns to support a 12.5 µs cycle time. Performance levels can be increased by not having to use wait-state or external cache-based code blocks.

  EEPROM and FRAM

  Not all forms of NovRAM are suitable for code storage, and EEPROM is one of them; EEPROM cells are larger, more complex, and often slower, which limits their ability to provide code for high-speed microcontrollers. However, there are advantages to using EEPROM for non-code-related, non-volatile storage within a microcontroller.

  Flash memory is a higher density non-volatile memory that is page oriented and the entire page must be loaded in order to read a single byte located anywhere on that page. The same is true for writes, where the entire page must be written to change a single byte.

  Freescale has added 16-bit EEPROM blocks to some of its microcontrollers, such as the MC812A4CPVE8, which is part of the supplier’s HC12 core family of 16-bit microcontrollers.EEPROM is cleverly used as a number of The EEPROM is cleverly used as a number of registers as well as a control block and a general-purpose array.

  Although arranged as 16-bit blocks, data can be read and programmed for byte and aligned word accesses in a single-cycle bus operation. Unaligned words require a second cycle. A bulk erase feature is also available.

  Another new non-volatile byte-wide accessible memory technology now available in embedded MCUs comes from Texas Instruments through the acquisition of FRAM technology. FRAM is ferroelectric RAM, similar to the original core memory used in early computers. It is reliable, inherently durable and radiation resistant.

  Architecturally, it is like a DRAM cell bus, using a layer of ferroelectric material instead of dielectric material to make it non-volatile, with fast writes and lower power consumption compared to flash memory technology. Another key advantage is the almost unlimited write endurance, such as SRAM.

  TI has placed FRAM modules in its popular low-power MSP430 family of parts, including small parts such as the 4k MSP430FR5720IRGER and larger 16k parts such as the MSP430FR5739IRHAR.

  An overview of the product training modules for FRAM microcontrollers is available on the Digi-Key website. Another product training module is also available, which is specific to the TI MSP430FR57xx FRAM MCUs.

  In summary, engineers should be aware that the memory technology we take for granted in MCUs is not the whole story. Many microcontrollers have special memory features and architectures that can work for you, and we’ve highlighted some of them in this article. In addition, the combination of new memory cells and traditional memory in modern microcontrollers can produce novel, secure applications for your designs.

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